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 DATA SHEET
MOS INTEGRATED CIRCUIT
PD16315
1/4- to 1/12-DUTY FIPTM(VFD) CONTROLLER/DRIVER
DESCRIPTION
The PD16315 is a FIP (Fluorescent Indicator Panel, or Vacuum Fluorescent Display) controller/driver that is driven on a 1/4- to 1/12- duty factor. It consists of 16 segment output lines, 4 grid output lines, 8 segment/grid output drive lines, a display memory, a control circuit, and a key scan circuit. Serial data is input to the PD16315 through a three-line serial interface. This FIP controller/driver is ideal as a peripheral device for a single-chip microcomputer.
FEATURES
* Multiple display modes: 16-segment & 12-digit to 24-segment & 4-digit * Key scanning: 16 x 2 matrix * Dimming circuit: 8 steps * High-withstanding-voltage output: VDD - 35 V MAX. * LED ports: 4 chs., 20 mA MAX. * No external resistors necessary for driver outputs: P-ch open-drain + pull-down resistor output * Serial interface: CLK, STB, DIN, DOUT
ORDERING INFORMATION
Part Number Package 44-pin Plastic QFP (10 x 10)
PD16315GB-3BS
The information in this document is subject to change without notice. Before using this document, please confirm that this is the latest version.
Not all products and/or types are available in every country. Please check with an NEC Electronics sales representative for availability and additional information.
Document No. S14074EJ1V0DS00 (1st edition) Date Published February 2003 NS CP(K) Printed in Japan
1999
PD16315
1. BLOCK DIAGRAM
Command decoder
Dimming circuit
24-bit output latch
24
16
DOUT CLK STB
Serial interface
Display memory 24 bits x 12 words
Segment driver
DIN
Seg1/KS1
8
Seg16/KS16
OSC OSC R
Timing generator key scan
8
Multiplexed driver
Seg17/Grid12
Data selector
Key data memory (2 x 16 bits)
12-bit shift register
Seg24/Grid5
8
Key1, Key2 2
12
4
Grid driver
Grid1
Grid4
4-bit latch VDD (+5 V) LED1 LED4 VSS (0 V) VEE (-30 V)
2
Data Sheet S14074EJ1V0DS
PD16315
2. PIN CONFIGURATION (Top View)
44-pin Plastic QFP (10 x 10)
Seg24/Grid5 Seg23/Grid6 Seg22/Grid7 Seg21/Grid8 35 Seg20/Grid9 34
Grid1
Grid2
Grid3 40
44
VSS
43
42
41
39
Grid4
VDD
38
37
36
LED1 LED2 LED3 LED4 OSC DOUT DIN CLK STB KEY1 KEY2
1 2 3 4 5 6 7 8 9 10 11
12 13 14 15 16 17 18 19 20 21 22
33 32 31 30 29 28 27 26 25 24 23
Seg19/Grid10 Seg18/Grid11 Seg17/Grid12 VEE Seg16/KS16 Seg15/KS15 Seg14/KS14 Seg13/KS13 Seg12/KS12 Seg11/KS11 Seg10/KS10
VDD
VSS
Seg1/KS1
Seg2/KS2
Seg3/KS3
Seg4/KS4
Seg5/KS5
Seg6/KS6
Seg7/KS7
Seg8/KS8
Caution Use all of the power supply pins.
Seg9/KS9
Data Sheet S14074EJ1V0DS
3
PD16315
3. PIN FUNCTION
Symbol DIN
Pin Name Data input 7
Pin No.
I/O Input
Description Input serial data at rising edge of shift clock, starting from the low order bit.
DOUT
Data output
6
Output
Output serial data at the falling edge of the shift clock, starting from low order bit. This is N-ch open-drain output pin.
STB
Strobe
9
-
Initializes serial interface at the rising or falling edge of the
PD16315. It then waits for reception of a command. Data input
after STB has fallen is processed as a command. While command data is processed, current processing is stopped, and the serial interface is initialized. While STB is high, CLK is ignored. CLK Clock input 8 Input Reads serial data at the rising edge, and outputs data at the falling edge. OSC Oscillator pin 5 - Connect resistor to this pin to determine the oscillation frequency to this pin. Connect resistor between this pin and GND (VSS). Seg1/KS1 to Seg16/KS16 Grid1 to Grid4 High-withstanding-voltage 14 to 29 output (Segment) High-withstanding-voltage 39 to 42 output (grid) Seg17/Grid12 to Seg24/Grid5 LED1 to LED4 KEY1, KEY2 VDD VSS VEE High-withstanding-voltage 31 to 38 output (segment/grid) LED output Key data input Logic power Logic ground Pull-down level 1 to 4 10, 11 13, 43 12, 44 30 Output Input - - - CMOS output, +20 mA MAX. Data input to these pins is latched at the end of the display cycle. 5 V 10% Connect this pin to system GND. VDD - 35 V MAX. Output These pins are selectable for segment or grid driving. Output Grid output pins Output Segment output pins (Dual function as key source)
4
Data Sheet S14074EJ1V0DS
PD16315
4. DISPLAY RAM ADDRESS AND DISPLAY MODE
The display RAM stores the data transmitted to the PD16315 through the serial communication. The addresses are allocated in 8-bit units.
Seg1
Seg4
00HL 03HL 06HL 09HL
Seg8
00HU 03HU 06HU 09HU 0CHU 0FHU 12HU 15HU 18HU 1BHU 1EHU 21HU
Seg12
01HL 04HL 07HL 0AHL 0DHL 10HL 13HL 16HL 19HL 1CHL 1FHL 22HL
Seg16
01HU 04HU 07HU 0AHU 0DHU 10HU 13HU 16HU 19HU 1CHU 1FHU 22HU
Seg20
02HL 05HL 08HL 0BHL 0EHL 11HL 14HL 17HL 1AHL 1DHL 20HL 23HL
Seg24
02HU 05HU 08HU 0BHU 0EHU 11HU 14HU 17HU 1AHU 1DHU 20HU 23HU DIG1 DIG2 DIG3 DIG4 DIG5 DIG6 DIG7 DIG8 DIG9 DIG10 DIG11 DIG12
0CHL 0FHL 12HL 15HL 18HL 1BHL 1EHL 21HL
b0
XXHL
b3
b4
XXHU
b7
Lower 4 bits
Higher 4 bits
Data Sheet S14074EJ1V0DS
5
PD16315
5. KEY MATRIX AND KEY-INPUT DATA STORAGE RAM
The key matrix is made up of a 16 x 2 matrix, as shown below.
KEY1 KEY2
Seg10/KS10
Seg11/KS11
Seg12/KS12
Seg13/KS13
Seg14/KS14
Seg15/KS15
The data of each key is stored as follows, and is read with the read command starting from the least significant bit. KEY1 KEY2
Seg1/KS1 Seg5/KS5 Seg9/KS9 Seg13/KS13
KEY1
KEY2 KEY1
KEY2 KEY1
KEY2
Seg2/KS2 Seg6/KS6 Seg10/KS10 Seg14/KS14
Seg3/KS3 Seg7/KS7 Seg11/KS11 Seg15/KS15
Seg4/KS4 Seg8/KS8 Reading Sequence Seg12/KS12 Seg16/KS16
b0
b1
b2
b3
b4
b5
b6
b7
5.1 LED Port Data is written to the LED port with the write command, starting from the least significant bit. "L" output when the bit of this port is 0, and "H" output when the bit is 1. The data of bits after the 5th bit are ignored.
MSB - - - - LSB b3 b2 b1 b0 LED1 LED2 LED3 LED4
Don't care
Remark Power ON application, all the LED ports are "L" output.
6
Data Sheet S14074EJ1V0DS
Seg16/KS16
Seg1/KS1
Seg2/KS2
Seg3/KS3
Seg4/KS4
Seg5/KS5
Seg6/KS6
Seg7/KS7
Seg8/KS8
Seg9/KS9
PD16315
6. COMMANDS
Commands set the display mode and status of the FIP
TM
(VFD) driver.
The first 1 byte input to the PD16315 through the DIN pin after the STB pin has fallen is regarded as a command. If STB is set high while commands/data are transmitted, serial communication is initialized, and the commands/data being transmitted are invalid (however, the commands/data previously transmitted remain valid). (1) Display mode setting commands These commands initialize the PD16315 and select the number of segments and the number of grids (1/4- to 1/12duty, 16 segments to 24 segments). When these commands are executed, the display is forcibly turned OFF, and key scanning is also stopped. To resume display, the display command "ON" must be executed. If the same mode is selected, however, nothing happens.
MSB 0 0 - - - LSB b2 b1 b0
Don't care
Display mode settings 0000 : 4 digits 24 segments 0001 : 5 digits 23 segments 0010 : 6 digits 22 segments 0011 : 7 digits 21 segments 0100 : 8 digits 20segments 0101 : 9 digits 19 segments 0110 : 10 digits 18 segments 0111 : 11 digits 17 segments 1xxx : 12 digits 16segments
Remark
Power ON application, the 12-digit, 16-segment mode is selected.
Data Sheet S14074EJ1V0DS
7
PD16315
(2) Data setting commands These commands set data write and data read modes.
MSB 0 1 - - LSB b3 b2 b1 b0
Don't care
Data write and read mode settings 00 : Write data to display memory 01 : Write data to LED port 10 : Read key data 11 : Don't care Address increment mode settings (Display memory) 0 : Increments address after data has been written 1 : Fixes address Test mode settings 0 : Nomal operation 1 : Test mode
Remark
Power ON application, the normal operation and address increment modes are set.
(3) Address setting commands These commands set an address of the display memory.
MSB 1 1 LSB b5 b4 b3 b2 b1 b0
Address (00H to 23H)
Remarks 1. If address 24H or higher is set, data is ignored, until a valid address is set. 2. Power ON application, the address is set to 00H.
8
Data Sheet S14074EJ1V0DS
PD16315
(4) Display control commands
MSB 1 0 - - LSB b3 b2 b1 b0
Don't care
Dimming quantity settings 000 : Set pulse width to 1/16. 001 : Set pulse width to 2/16. 010 : Set pulse width to 4/16. 011 : Set pulse width to 10/16. 100 : Set pulse width to 11/16. 101 : Set pulse width to 12/16. 110 : Set pulse width to 13/16. 111 : Set pulse width to 14/16. Turns ON/OFF display. 0 : Display OFF (Key scan continuesNote) 1 : Display ON
Note Power ON application, key scanning is stopped. Remark Power ON application, the 1/16 pulse width is set and the display is turned OFF.
Data Sheet S14074EJ1V0DS
9
PD16315
7. KEY SCANNING AND DISPLAY TIMING
TDISP 500 s Key scan data
SEG output
DIG1
DIG2
DIG3
DIGn
DIG1
G1
1/16TDISP G2
G3
Gn
1 frame = TDISP x (n + 1)
Remark One cycle of key scanning consists of two frame, and data in a 16 x 2 matrix is stored in RAM.
Key Scan Expansion
1st frame DIGn 2nd frame
1 9
2
3
4
5
6
7
8 DIG1
10 11 12 13 14 15 16
10
Data Sheet S14074EJ1V0DS
PD16315
8. SERIAL COMMUNICATION FORMAT
Reception (command/data write)
If data continues
STB
DIN
b0
b1
b2
b6
b7
CLK
1
2
3
7
8
Transmission (data read)
STB
DIN
b0
b1
b2
b3
b4
b5
b6
b7
CLK DOUT
1
2
3
4
5
6
7
8
tWAIT Note
1
2
3
4
5
6
b0
b1
b2
b3
b4
b5
A data read command is set.
Data is read.
Note When data is read, a wait time tWAIT of 1 s is necessary since the rising of the eighth clock that has set the command, until the falling of the first clock that has read the data. Remark Because the DOUT pin is an N-ch, open-drain output pin, be sure to connect an external pull-up resistor (1 to 10 k) to this pin.
Data Sheet S14074EJ1V0DS
11
PD16315
9. ELECTRICAL SPECIFICATIONS
Absolute Maximum Ratings (TA = 25C, VSS = 0 V)
Parameter Logic Supply Voltage Driver Supply Voltage Logic Input Voltage FIP Driver Output Voltage LED Driver Output Current FIP Driver Output Current Symbol VDD VEE VI1 VO2 IO1 IO2 Ratings -0.5 to +6.0 VDD + 0.5 to VDD - 40 -0.5 to VDD + 0.5 VEE - 0.5 to VDD + 0.5 20 -40 (grid) -15 (segment) Power Dissipation Operating Ambient Temperature Storage Temperature PD TA Tstg 800
Note
Unit V V V V mA mA
mW C C
-40 to +85 -65 to +150
Note Derate at -6.4 mW/C at TA = 25C or higher. Caution Product quality may suffer if the absolute maximum rating is exceeded even momentarily for any parameter. That is, the absolute maximum ratings are rated values at which the product is on the verge of suffering physical damage, and therefore the product must be used under conditions that ensure that the absolute maximum ratings are not exceeded. Recommended Operating Range (TA = -20 to 70C, VSS = 0 V)
Parameter Logic Supply Voltage High-Level Input Voltage Low-Level Input Voltage Driver Supply Votlage Symbol VDD VIH VIL VEE MIN. 4.5 0.7 VDD 0 0 TYP. 5 MAX. 5.5 VDD 0.3 VDD VDD - 35 Unit V V V V
Remark
Maximum power consumption PMAX. = FIP driver dissipation + RL dissipation + LED driver dissipation + dynamic power consumption Where segment current = 3 mA, grid current = 15 mA, and LED current = 20 mA, FIP driver dissipation = number of segments x 6 + number of grids/(number of grids + 1) x 30 (mW) RL dissipation (VDD - VEE) /50 x (number of segments + 1) (mW)
2
LED driver dissipation = number of LEDs x 20 (mW) Dynamic power consumption = VDD x 5 (mW)
12
Data Sheet S14074EJ1V0DS
PD16315
Electrical Characteristics (TA = -20 to +70C, VDD = 4.5 to 5.5 V, VSS = 0 V, VEE = VDD - 35 V)
Parameter High-Level Output Voltage Low-Level Output Voltage Low-Level Output Voltage High-Level Output Current Symbol VOH1 VOL1 VOL2 IOH21 Test Conditions LED1 - LED4, IOH1 = -15 mA LED1 - LED4, IOL1 = +15 mA DOUT, IOL2 = 4 mA VO = VDD - 2 V, Seg1/ KS1 to Seg16/ KS16 High-Level Output Current IOH22 VO = VDD - 2 V, Grid1 to Grid4 Seg17 / Grid12 to Seg24 / Grid5 Driver Leakage Current Output Pull-Down Resistor Input Current High-Level Input Voltage Low-Level Input Voltage Hysteresis Voltage Dynamic Current Consumption IOLEAK RL II VIH VIL VH IDDdyn CLK, DIN, STB Under no load, display OFF 0.35 5 VO = VDD - 35 V, driver OFF Driver output VI = VDD or VSS 0.7 VDD 0.3 VDD 40 65 -10 120 1 -15 mA -3 MIN. VDD - 1 1 0.4 TYP. MAX. Unit V V V mA
A
k
A
V V V mA
Switching Characteristics (TA = -20 to +70C, VDD = 4.5 to 5.5 V, VEE = -30 V)
Parameter Oscillation Frequency Propagation Delay Time Symbol fOSC tPLZ tPZL Rise Time tTZH1 tTZH2 R = 82 k CLK DOUT CL = 15 pF, RL = 10 k CL = 300 pF Seg1/KS1 to Seg16/KS16 Grid1 to Grid4, Seg17/Grid12 to Seg24/Grid5 Fall Time Maximum Clock Frequency Input Capacitance tTHZ fMAX. CI CL = 300 pF, Segn, Gridn Duty = 50% 1 15 160 Test Conditions MIN. 350 TYP. 500 MAX. 650 300 100 2 0.5 Unit kHz ns ns
s s
s
MHz pF
Data Sheet S14074EJ1V0DS
13
PD16315
Timing Conditions (TA = -20 to 70C, VDD = 4.5 to 5.5 V)
Parameter Clock Pulse Width Strobe Pulse Width Data Setup Time Data Hold Time Clock-Strobe Time Wait Time Symbol PWCLK PWSTB tSETUP tHOLD tCLK-STB tWAIT CLK STB CLK CLK
Note
Test Conditions
MIN. 400 1 100 100 1 1
TYP.
MAX.
Unit ns
s
ns ns
s s
Note Refer to the SERIAL COMMUNICATION FORMAT.
14
Data Sheet S14074EJ1V0DS
PD16315
Switching Characteristic Waveforms
fOSC
50%
OSC
PWSTB
STB tCLK-STB PWCLK CLK tSETUP tHOLD PWCLK
DIN tPZL tPLZ
DOUT
tTHZ 90% Sn/Gn 10%
tTZH
Data Sheet S14074EJ1V0DS
15
PD16315
10. APPLICATIONS
Updating display memory by incrementing address
STB
CLK
........... ...........
DIN
Command 1
Command 2
Command 3
Data 1
Data n
Command 4
Command 1 : sets display mode Command 2 : sets data Command 3 : sets address Data 1 to n : transfers display data (36 bytes MAX.) Command 4 : controls display Updating specific address
STB
CLK
DIN
Command 1
Command 2
Data
Command 2
Data
Command 1 : sets data Command 2 : sets address Data : display data
16
Data Sheet S14074EJ1V0DS
PD16315
11. CIRCUIT EXAMPLE FOR APPLICATION
VDD
VDD LED R1
LED1 LED2 LED3 LED4
R3 In the case of low-level output is display ON signal.
To Microcontroller
DOUT DIN CLK STB
OSC R2
PD16315
Grid1 to Grid4
KEY2 R4
Seg16/KS16
+5 V C 0V -30 V
VDD VSS VEE
Seg17/Grid12 to Seg24/Grid5
KEY1
Seg1/KS1
4
8
Key Matrix Note (16 x 2)
Fluorescent Indicator Panel (FIPTM) (VFD)
F+ Driving voltage for FIP
F-
TM
(VFD)
Note
=
Remark
R1, R4 = 1 k to 10 k R2 = 82 k R3 = 330 to 1 k C = 0.1 to 1.0 F
Data Sheet S14074EJ1V0DS
17
PD16315
12. PACKAGE DRAWING
44-PIN PLASTIC QFP (10x10)
A B
33 34
23 22
detail of lead end S C D R Q
44 1
12 11
F J G P H I
M
K M N S
L
S
NOTE Each lead centerline is located within 0.16 mm of its true position (T.P.) at maximum material condition.
ITEM A B C D F G H I J K L M N P Q R S
MILLIMETERS 13.20.2 10.00.2 10.00.2 13.20.2 1.0 1.0 0.37 +0.08 -0.07 0.16 0.8 (T.P.) 1.60.2 0.80.2 0.17 +0.06 -0.05 0.10 2.70.1 0.1250.075 3 +7 -3 3.0 MAX. S44GB-80-3BS-2
18
Data Sheet S14074EJ1V0DS
PD16315
13. RECOMMENDED SOLDERING CONDITIONS
The following conditions must be met for soldering conditions of the PD16315. For more details, refer to the Semiconductor Device Mounting Technology Manual (C10535E). Please consult with our sales offices in case other soldering process is used, or in case the soldering is done under different conditions. Type of Surface Mount Device
PD16315GB-3BS : 44-pin plastic QFP (10 x 10)
Soldering process Infrared ray reflow Soldering conditions Peak package's surface temperature: 235C or below, Reflow time: 30 seconds or below (210C or higher), Number of reflow process: MAX.3 VPS Peak package's temperature: 215C or below, Reflow time: 25 to 40 seconds (200C or higher), Number of reflow process: MAX.3 Wave Soldering Solder temperature: 260C or below, Flow time: 10 seconds or below Temperature of pre-heat: 120C pr below (Plastic surface temperature) Number of flow process: 1 Partial heating method Terminal temperature: 300C or below, Time 3 seconds or below (per side of pin position) - WS60-00-1 VP15-00-3 Symbol IR35-00-3
Caution Do not apply more than a single process at once, except for partial heating method.
Data Sheet S14074EJ1V0DS
19
PD16315
NOTES FOR CMOS DEVICES
1 PRECAUTION AGAINST ESD FOR SEMICONDUCTORS Note: Strong electric field, when exposed to a MOS device, can cause destruction of the gate oxide and ultimately degrade the device operation. Steps must be taken to stop generation of static electricity as much as possible, and quickly dissipate it once, when it has occurred. Environmental control must be adequate. When it is dry, humidifier should be used. It is recommended to avoid using insulators that easily build static electricity. Semiconductor devices must be stored and transported in an anti-static container, static shielding bag or conductive material. All test and measurement tools including work bench and floor should be grounded. The operator should be grounded using wrist strap. Semiconductor devices must not be touched with bare hands. Similar precautions need to be taken for PW boards with semiconductor devices on it. 2 HANDLING OF UNUSED INPUT PINS FOR CMOS Note: No connection for CMOS device inputs can be cause of malfunction. If no connection is provided to the input pins, it is possible that an internal input level may be generated due to noise, etc., hence causing malfunction. CMOS devices behave differently than Bipolar or NMOS devices. Input levels of CMOS devices must be fixed high or low by using a pull-up or pull-down circuitry. Each unused pin should be connected to VDD or GND with a resistor, if it is considered to have a possibility of being an output pin. All handling related to the unused pins must be judged device by device and related specifications governing the devices. 3 STATUS BEFORE INITIALIZATION OF MOS DEVICES Note: Power-on does not necessarily define initial status of MOS device. Production process of MOS does not define the initial operation status of the device. Immediately after the power source is turned ON, the devices with reset function have not yet been initialized. Hence, power-on does not guarantee out-pin levels, I/O settings or contents of registers. Device is not initialized until the reset signal is received. Reset operation must be executed immediately after power-on for devices having reset function.
20
Data Sheet S14074EJ1V0DS
PD16315
Reference Documents NEC Semiconductor Device Reliability/Quality Control System (C10983E) Quality Grades On NEC Semiconductor Devices (C11531E)
FIP
TM
is a trademark of NEC Corporation
* The information in this document is current as of February, 2003. The information is subject to change without notice. For actual design-in, refer to the latest publications of NEC Electronics data sheets or data books, etc., for the most up-to-date specifications of NEC Electronics products. Not all products and/or types are available in every country. Please check with an NEC Electronics sales representative for availability and additional information. * No part of this document may be copied or reproduced in any form or by any means without the prior written consent of NEC Electronics. NEC Electronics assumes no responsibility for any errors that may appear in this document. * NEC Electronics does not assume any liability for infringement of patents, copyrights or other intellectual property rights of third parties by or arising from the use of NEC Electronics products listed in this document or any other liability arising from the use of such products. No license, express, implied or otherwise, is granted under any patents, copyrights or other intellectual property rights of NEC Electronics or others. * Descriptions of circuits, software and other related information in this document are provided for illustrative purposes in semiconductor product operation and application examples. The incorporation of these circuits, software and information in the design of a customer's equipment shall be done under the full responsibility of the customer. NEC Electronics assumes no responsibility for any losses incurred by customers or third parties arising from the use of these circuits, software and information. * While NEC Electronics endeavors to enhance the quality, reliability and safety of NEC Electronics products, customers agree and acknowledge that the possibility of defects thereof cannot be eliminated entirely. To minimize risks of damage to property or injury (including death) to persons arising from defects in NEC Electronics products, customers must incorporate sufficient safety measures in their design, such as redundancy, fire-containment and anti-failure features. * NEC Electronics products are classified into the following three quality grades: "Standard", "Special" and "Specific". The "Specific" quality grade applies only to NEC Electronics products developed based on a customerdesignated "quality assurance program" for a specific application. The recommended applications of an NEC Electronics product depend on its quality grade, as indicated below. Customers must check the quality grade of each NEC Electronics product before using it in a particular application. "Standard": Computers, office equipment, communications equipment, test and measurement equipment, audio and visual equipment, home electronic appliances, machine tools, personal electronic equipment and industrial robots. "Special": Transportation equipment (automobiles, trains, ships, etc.), traffic control systems, anti-disaster systems, anti-crime systems, safety equipment and medical equipment (not specifically designed for life support). "Specific": Aircraft, aerospace equipment, submersible repeaters, nuclear reactor control systems, life support systems and medical equipment for life support, etc. The quality grade of NEC Electronics products is "Standard" unless otherwise expressly specified in NEC Electronics data sheets or data books, etc. If customers wish to use NEC Electronics products in applications not intended by NEC Electronics, they must contact an NEC Electronics sales representative in advance to determine NEC Electronics' willingness to support a given application. (Note) (1) "NEC Electronics" as used in this statement means NEC Electronics Corporation and also includes its majority-owned subsidiaries. (2) "NEC Electronics products" means any product developed or manufactured by or for NEC Electronics (as defined above).
M8E 02. 11-1


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